1. Field of the Invention
The present invention relates generally to temperature and process-induced integrated-circuit parameter errors and more particularly, to structures and methods for correcting such errors.
2. Description of the Related Art
Because they are created by the same diffusion processes, active components of integrated circuits are inherently well matched. In an active-component example, equal values of V.sub.BE in different bipolar transistors generate substantially equal base and emitter currents and absolute V.sub.BE values substantially track over temperature. Similarly, passive-component values (e.g., resistances) substantially track over temperature.
Absolute parameter values, however, vary over temperature within one integrated circuit and vary from lot-to-lot because of process-induced changes. Various conventional integrated-circuit design techniques (e.g., current mirroring and feedback) can generally correct the signal errors that would otherwise result from these changes. For example, feedback is typically used to cause amplifier gains to be defined as resistor ratios because such ratios substantially cancel temperature and process-induced changes.
Nonetheless, there are change-induced signal errors whose correction is not amenable to conventional integrated-circuit design techniques. An exemplary case is found in the pipelined stages of a subranging analog-to-digital converter (ADC).
In these converters, an initial ADC stage responds to the output of an initial sampler by quantizing the analog input signal to an initial number of digital bits. A digital-to-analog converter (DAC) responds to the initial ADC stage and its analog output is subtracted from the sampler's output to obtain an analog residue signal which is then pipelined to a subsequent ADC stage that quantizes it to a subsequent number of digital bits.
To enhance operation of the subsequent ADC stage, the residue signal is typically "gained up" by a precision amplifier and then sampled by a subsequent sampler. Subranging ADC degradation (e.g., nonlinearities, missing codes) will be observed if the processed residue signal does not match the input range of the subsequent stage.
Closed-loop feedback techniques are typically used to substantially eliminate gain errors in the precision amplifier but, principally because of speed considerations, these techniques are generally not available to the subsequent sampler. Accordingly, it forms a source of unresolved pipeline gain error which can cause subranging ADC degradation.